f8 representation Alex Shinn (17 Feb 2021 10:24 UTC)
Re: f8 representation Bradley Lucier (17 Feb 2021 18:55 UTC)
Re: f8 representation John Cowan (17 Feb 2021 21:33 UTC)
Re: f8 representation Alex Shinn (18 Feb 2021 12:21 UTC)
Re: f8 representation John Cowan (18 Feb 2021 15:29 UTC)
Re: f8 representation Alex Shinn (19 Feb 2021 01:15 UTC)
Re: f8 representation Lucier, Bradley J (19 Feb 2021 01:29 UTC)
Re: f8 representation Alex Shinn (21 Feb 2021 01:16 UTC)

f8 representation Alex Shinn 17 Feb 2021 10:23 UTC

The doc specifies f16 and f8 storage classes, which do not
have a corresponding uniform vector in SRFI 160 (or 4).

IEEE 754 specifies a half precision which is widely used
and can be assumed for f16, having 5 bits for the exponent
and 10 for the significand.

There are a number of competing implementations of 8-bit
floats, and at such extreme compression the best split of
exponent and significand becomes application specific.

What is the intended representation of f8-storage-class?

--
Alex