On 2/17/21 5:23 AM, Alex Shinn wrote:
> The doc specifies f16 and f8 storage classes, which do not
> have a corresponding uniform vector in SRFI 160 (or 4).
>
> IEEE 754 specifies a half precision which is widely used
> and can be assumed for f16, having 5 bits for the exponent
> and 10 for the significand.
>
> There are a number of competing implementations of 8-bit
> floats, and at such extreme compression the best split of
> exponent and significand becomes application specific.
>
> What is the intended representation of f8-storage-class?
>

I was not informed enough about short-precision floats to have an answer
to this question.

I suppose it would not be an issue if there are true f8 values in an
implementation, as one would require only that the bit representation of
values coming out of an array are the same as the bit values that go in.

Or one could have storage classes with bespoke f8 formats implemented
within the storage class (like the u1-storage-class implementation based
on u16vectors).

Perhaps other people could offer suggestions.

Brad